Events

LEGaTO Final Event: Low-Energy Heterogeneous Computing Workshop

The LEGaTO final event, titled "LEGaTO: Low-Energy Heterogeneous Computing Workshop" and collocated with FPL2020, will be held virtually on Friday 4 September 2020.

LEGaTO is a three-year H2020 project on developing a toolset for low-energy heterogeneous computing that also considers fault tolerance, programmability and security. The project optimized a number of use cases for low-energy. The objective of the workshop is to apply the optimization low-energy techniques to other stakeholders in each of the use cases.

Scope

We are broadly looking to engage the Artificial Intelligence, Smart City, Smart Home, Healthcare and IOT communities to evangelize the low-energy optimization techniques that we have developed for these communities during the lifetime of the LEGaTO project. In particular, we will showcase how the heterogeneous low-energy small form-factor hardware could be coupled to an energy efficient runtime to produce one order of energy savings across these use cases. The workshop will consist of invited talks from these communities and will include insights gained during the project for ensuring fault-tolerance and security in addition to energy efficiency.

Registration

Registration is free and open until 15 August. The registration form is available here.

Programme

Friday 4 September 2020 (CEST)

9.45-10.00 Opening remarks and LEGATO Introduction
10.00-10.30 Keynote talk
10.30-11.15

Session 1: Energy Efficiency

Chair: Jens Hagemeyer (Bielefeld University)

Abstract: Information and Communication Technology (ICT) is forecasted to global electricity usage by 2030 was estimated at 21% in a likely scenario and 51% in the worst-case. This bleak outlook requires the ICT sector to take urgent and radical action to limit the energy consumption of the sector. This session will look at unconventional means to achieve this goal. All market segments of the ICT area from Supercomputers to Embedded HPC systems will need to be radically energy-efficient; these two cases will be highlighted in the session.

11.15-11.30 Comfort break
11.30-12.15

Session 2: Fault Tolerance and Security

Chair: Leo Bautista (BSC)

Abstract: With the scaling of technology node to 6-7 nanometers, transistors are becoming more susceptible to transient and permanent errors. On the other hand, security lapses are making it very challenging to patch hardware/software of ICT systems. This session will look into fault-tolerance and security challenges facing datacenters and embedded systems.

12.15-13.00

Session 3: AI and Smart City / Smart Home

Chair: Micha vor dem Berge (Christmann IT)

Abstract: The proliferation of edge and fog computing and the availability of data generated by zero emissions electric vehicles and smart home automation have driven the ICT industry to provide AI-driven solutions for these use cases. In this session we will discuss the convergence of HPC and AI in smart city/home market segments.

13.00-14.00  Lunch break
14.00-14.45

Session 4: FPGAs and Programming Models

Chair: Miquel Pericàs (Chalmers University of Technology)

Abstract: FPGAs have become an attractive compute fabric which offers almost ASIC class performance per watt. However, their progammability had been an issue that impacted their take-up by more use cases. Recently, FPGAs have become easier to program as well as providing leadership class performance per watt. This sesssion will discuss recent FPGA developments in energy-efficiency and programmability.

14.45-15.30 

Closed poster session (LEGaTO students)

Chair: Behzad Salami (BSC)

15.30-15.45 Comfort break
15.45-16.30

Session 5: EU related projects

Chair: Marcelo Pasin (Université de Neuchâtel)

16.30-17.00 Wrap-up and conclusions